x86: support newer Intel CPU models
authorJan Beulich <jbeulich@suse.com>
Tue, 24 Mar 2015 08:23:00 +0000 (09:23 +0100)
committerJan Beulich <jbeulich@suse.com>
Tue, 24 Mar 2015 08:23:00 +0000 (09:23 +0100)
commit8779c65538a1132751c0342266ffc4090e5f41e1
tree6745877d6662e0f2134e444ccff805ec7971fbc1
parent8ff330ec11e471919621bce97c069b83b0319d15
x86: support newer Intel CPU models

This just follows what the January 2015 edition of the SDM documents,
with additional clarification from Intel:
- Broadwell models 0x4f and 0x56 don't cross-reference other tables,
  but should be treated like other Boradwell (0x3d),
- Xeon Phi model 0x57 lists LASTBRANCH_TOS but not where the actual
  stack is. Being told it's Silvermont based, attach it there.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
xen/arch/x86/acpi/cpu_idle.c
xen/arch/x86/hvm/vmx/vmx.c
xen/arch/x86/hvm/vmx/vpmu_core2.c